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ECC RAM is no slower than regular RAM.

At least, it doesn't have to be. The overlap between overclocked, XMP'd memory and ECC is a null set, but that's not due to physics.



It partially is, the biggest issue with parallel busses like that of DRAM is skew between the bit lanes. You need the electrical pulses to physically arrive at the same time. It's more difficult to layout 71 bits of exactly equal length than 64.




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